This application claims priority to and the benefit of Korean Patent Application No. 2002-0030324 filed on May 30, 2002 in the Korean Intellectual Property Office, the content of which is incorporated herein by reference.
(a) Field of the Invention
The present invention relates to an apparatus and method for driving a plasma display panel. More specifically, the present invention relates to an address driver circuit for a plasma display panel.
(b) Description of the Related Art
In recent years, flat panel displays such as a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and the like have been actively developed. The PDP is advantageous over the other flat panel displays in regard to its high luminance, high luminous efficiency, and wide view angle, and accordingly, it is favorable for making a large-scale screen of more than 40 inches as a substitute for the conventional cathode ray tube (CRT).
The PDP is a flat panel display that uses plasma generated by gas discharge to display characters or images and includes, according to its size, more than several scores to millions of pixels arranged in a matrix pattern. Such a PDP is classified into a direct current (DC) PDP and an alternating current (AC) PDP according to its discharge cell structure and the waveform of the driving voltage applied thereto.
The DC PDP has electrodes exposed to a discharge space to allow DC to flow through the discharge space while voltage is applied, and thus requires a resistance for limiting the current. Contrarily, the AC PDP has electrodes covered with a dielectric layer that naturally form a capacitance component to limit the current and to protect the electrodes from the impact of ions during discharge, and is thus superior to the DC PDP in regard to long lifetime.
Typically, the driving method of the AC PDP is composed of a reset (initialization) step, an addressing (write) step, a sustain discharge step, and an erase step.
In the reset step, the state of each cell is initialized in order to readily perform an addressing operation on the cell. In the write step, wall charges are formed on selected xe2x80x9conxe2x80x9d-state cells (i.e., addressed cells) in the panel. In the sustain step, a discharge occurs to actually display an image on the addressed cells. In the erase step, the wall charges on the cells are erased to end the sustain discharge.
In the AC PDP, the panel between address, sustain, and scan electrodes acts as a capacitance load and is therefore called a panel capacitor. Due to the capacitance of the panel capacitor, there is a need for a reactive power in order to apply a waveform for addressing or sustain discharge. A circuit for recovering the reactive power and reusing it is called a xe2x80x9cpower recovery circuitxe2x80x9d, some of which have been suggested by L. F. Weber (in U.S. Pat. Nos. 4,866,349 and 5,081,400).
With the conventional power recovery circuit mounted on an address buffer board, a parasitic inductance component Lp as shown in FIG. 1 may be caused by the output pattern 10 running in the lengthwise direction of the address buffer board. In FIG. 1, the circuit on the left side of parasitic inductance component Lp is a power recovery circuit proposed by Weber, and capacitor Cp is a panel capacitor functioning as a capacitive load.
In detail, there is a need for a plurality of address-driving ICs in order to drive address electrodes, because all the address electrodes cannot be coupled to a single address-driving IC. With the plural address-driving ICs coupled to one power recovery circuit, a parasitic inductance component may be formed on the output pattern in which the address-driving ICs are coupled to the address buffer board. The parasitic inductance component causes an extreme distortion of the address-driving waveform. Namely, an undesired pulse rise may occur in the rise/drop interval of the address-driving waveform because of the parasitic inductance component.
In accordance with the present invention a power recovery circuit recovers a reactive power necessary for address driving and minimizes the effect of a parasitic inductance component existing in an address driver circuit. Energy is stored in both inductors and parasitic inductance components. First and second inductors have one terminal thereof coupled to both terminals of a path coupled to one terminal of a panel capacitor.
In a first aspect of the present invention, there is provided an apparatus for driving a PDP. A first switch and a first capacitor are coupled in series between the other terminal of the first inductor and a first power source supplying a first voltage. A second switch and a second capacitor are coupled in series between the other terminal of the second inductor and the first power source. A third switch is coupled between a second power source for supplying a second voltage and the one terminal of the first inductor. A fourth switch is coupled between the one terminal of the second inductor and the first power source. The first and second capacitors are charged to a voltage substantially corresponding to half of the second voltage. Preferably, a parasitic inductance component is formed on the path. The apparatus further includes first and second diodes respectively formed on a path including the first switch and the first inductor and a path including the second switch and the second inductor. The apparatus further includes a first diode coupled between the first power source and the other terminal of the first inductor, and a second diode coupled between the other terminal of the second inductor and the second power source. Preferably, the third and fourth switches have a body diode.
In a second aspect of the present invention, there is also provided an apparatus for driving a PDP. A first voltage changer changes the terminal voltage of the panel capacitor to a second voltage using the energy stored in a first inductor and a resonance. A second voltage changer changes the terminal voltage of the panel capacitor to the first voltage using the energy stored in a second inductor and the resonance. A power supply section includes first and second power sources, the first power source supplying the first voltage and sustaining the terminal voltage of the panel capacitor at the first voltage, the second power source supplying the second voltage and sustaining the terminal voltage of the panel capacitor at the second voltage. The energy is stored in the first inductor through a current path formed from the first inductor to one terminal of the panel capacitor, while a terminal voltage of the panel capacitor is sustained at a first voltage. Further, the energy is stored in the second inductor through a current path formed from one terminal of the panel capacitor to the second inductor, while the terminal voltage of the panel capacitor is sustained at the second voltage. Preferably, the apparatus further includes first and second capacitors charged to a third voltage substantially corresponding to half of the difference between the second voltage and the first voltage. The apparatus further includes a first switch being coupled between the first inductor and the first capacitor and performing a switching operation to flow a current to the first inductor; and a second switch being coupled between the second inductor and the second capacitor and performing a switching operation to flow a current to the second inductor. Preferably, the apparatus includes a first path for recovering a current flowing to the first inductor, and a second path for recovering a current flowing to the second inductor. The first voltage changer further includes a switch performing a switching operation to sustain the terminal voltage of the panel capacitor at the second voltage and having a body diode through which a current flowing to the first inductor is recovered. Likewise, the second voltage changer further includes a switch performing a switching operation to sustain the terminal voltage of the panel capacitor at the first voltage and having a body diode through which a current flowing to the second inductor is recovered.
In a third aspect of the present invention, there is provided a method for driving a PDP. Energy is stored in a first inductor coupled to one terminal of a path coupled to one terminal of the panel capacitor, while a terminal voltage of the panel capacitor is sustained at a first voltage. The terminal voltage of the panel capacitor is changed to a second voltage using the energy stored in the first inductor and a resonance. A current flowing to the first inductor is recovering while sustaining the terminal voltage of the panel capacitor at the second voltage. Energy is stored in a second inductor coupled to the other terminal of the path, while the terminal voltage of the panel capacitor is sustained at the second voltage. The terminal voltage of the panel capacitor is changed to the first voltage using the energy stored in the second inductor and the resonance. A current flowing to the second inductor is recovered while sustaining the terminal voltage of the panel capacitor at the first voltage. In storing the energy in the first inductor, there is used a first capacitor charged to a third voltage substantially corresponding to half of the difference between the second voltage and the first voltage. In storing the energy in the second inductor, the difference between the second voltage and the third voltage charged on the second capacitor is used. Preferably, the terminal voltage of the panel capacitor is sustained at the second voltage using a power source for supplying the second voltage, and a current flowing to the first inductor is recovered through a path formed between the first inductor and the power source. Preferably, the terminal voltage of the panel capacitor is sustained at the first voltage using a power source for supplying the first voltage, and a current flowing to the second inductor is recovered through a path formed between the power source and the second inductor.
In a fourth aspect of the present invention, there is further provided an apparatus for driving a PDP. A panel capacitor is coupled on a lengthwise conductive pattern and an address-driving waveform is applied to the panel capacitor. The apparatus includes first and second inductors each having one terminal thereof coupled to both terminals of the conductive pattern. Here, a first current path is formed to flow a first current through the first inductor and the conductive pattern. A second current path is formed to cause a resonance of the first inductor and the panel capacitor while the first current flows, thereby changing a voltage of the panel capacitor to a first voltage due to the resonance. A third current path is formed to recover a current remaining in the first inductor, while the voltage of the panel capacitor is sustained at the first voltage. A fourth current path is then formed to flow a second current through the conductive pattern and the second inductor. A fifth current path is formed to cause a resonance of the second inductor and the panel capacitor while the second current flows, thereby changing the voltage of the panel capacitor to a second voltage due to the resonance. A sixth current path is formed to recover a current remaining in the second inductor while the voltage of the panel capacitor is sustained at the second voltage.